The move to multi-die packaging is driving chipmakers to develop more cost-effective ways to ensure only known-good die are integrated into packages, because the price of failure is significantly ...

Process excursion, or any deviation in a certain process, significantly impacts the cost of semiconductor manufacturing process and product yield. During production, process excursion can be detected ...

The Chinese module maker and the Australian National University utilized phosphorus diffusion gettering and another defect mitigation strategy to improve the quality of n-type wafers. The proposed ...

SANTA CLARA, Calif.–Looking to reduce the soaring costs of IC test, Intel Corp. hopes to leverage its “casual learning algorithm” technology for wafer sort applications in the fab. Intel is looking to ...

Across the semiconductor industry, ensuring cleanrooms and mini-environments are sufficiently monitored for particle sizes down to 100 nm is a common practice. Most industries have adopted this ...